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A state logic control system is a programming method created for PLCs. A state logic control system uses a state transition diagram as a model of reality, thus using the fundamentals of finite-state machine theory as the basis of a programming language. State logic enables users to model the application they are trying to control by using a hierarchy that consists of Tasks, subdivided by States which are described by Statements. 'Tasks' are a description of a sequential activity of the model. The machines, applications or processes being modelled by state logic will usually contain more than one 'task', representing several different and possibly parallel activities. Each of these activities will contain a given number of 'states'. As in finite-state machine theory, only one 'state' will be active at a time, and certain inputs and outputs will cause the transition between different states. Given that PLCs usually control systems which are easily represented by a state transition diagram, the use of a very high-level programming language such as state logic greatly helps the PLC programmer in making intuitive control programs. ==See also== * Programmable logic controller * Digital circuit 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「State logic」の詳細全文を読む スポンサード リンク
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